254 channels for SPA with address bus comparison;

    512 channels for SPA with bus injection ;

    SPA timer resolution can be 80ns, 160ns, 320ns till 5120ns

    Total timer counter: 40 bits

    Module accumulative total time: 32 bits counter

    Module maximum exe time: 32 bits counter  

    Module minimum exe time: 32 bits counter

    Stack overflow check within 4G size

    Trace 32 bits of Address bus, 32 bits of Data bus and 3 bits of CPU  status when stack overflow:128 frames backward and 128 frames forward trace

   32K Frames with 112 bits trace with 32 bits Address bus, 32 bits data bus, 40 bits time stamp, 3 bits status, 5 bits external port inputs

   Trigger can be Multi Address, Multi Data bus, CPU status and external trigger input pin at rising edge or falling edge

   Qualify can be Address Range, Multi Address, Multi Data bus, CPU status